K4Y50164UC Datasheet, PDF (35/76 Pages) Samsung semiconductor – 512Mbit XDR TM DRAM(C-die)

K4Y50164UC
K4Y50084UC
K4Y50044UC
K4Y50024UC
XDR^TM DRAM
Figure 14 : Serial Write Transaction
S₀ S₂ S₄ S₆ S₈ S₁₀ S₁₂ S₁₄ S₁₆ S₁₈ S₂₀ S₂₂ S₂₄ S₂₆ S₂₈ S₃₀ S₃₂ S₃₄ S₃₆ S₃₈ S₄₀ S₄₂ S₄₄ S₄₆ S₄₈
SCK
RST
t_CYC,SCK
transaction
CMD
Start SCMD
2’h0,SID[5:0]
SADR[7:0]
SWD[7:0]
‘1’ ‘1’ ‘0’ ‘0’ ‘0’ ‘0’‘0’ ‘0’ 5 4 3 2 1 0 7 6 5 4 3 2 1 0 ‘0’ 7 6 5 4 3 2 1 0 ‘0’
SDI
(input)
SDO
(output)
Figure 15 : Serial Read Transaction — Selected DRAM
SCK
S₀ S₂ S₄ S₆ S₈ S₁₀ S₁₂ S₁₄ S₁₆ S₁₈ S₂₀ S₂₂ S₂₄ S₂₆ S₂₈ S₃₀ S₃₂ S₃₄ S₃₆ S₃₈ S₄₀ S₄₂ S₄₄ S₄₆ S₄₈
RST
t_CYC,SCK
transaction
CMD
SDI
(input)
SDO
(output)
Start SCMD
2’h0,SID[5:0]
SADR[7:0]
8’h00
‘1’ ‘1’ ‘0’ ‘0’ ‘1’ ‘0’‘0’ ‘0’ 5 4 3 2 1 0 7 6 5 4 3 2 1 0 ‘0’‘0’ ‘0’ ‘0’ ‘0’ ‘0’ ’0’ ‘0’ ‘0’ ‘0’
SRD[7:0]
76543210
Figure 16 : Serial Read Transaction — Non-selected DRAM
S₀ S₂ S₄ S₆ S₈ S₁₀ S₁₂ S₁₄ S₁₆ S₁₈ S₂₀ S₂₂ S₂₄ S₂₆ S₂₈ S₃₀ S₃₂ S₃₄ S₃₆ S₃₈ S₄₀ S₄₂ S₄₄ S₄₆ S₄₈
SCK
RST
CMD
SDI
(input)
SDO
(output)
t_CYC,SCK
transaction
Start SCMD
2’h0,SID[5:0]
SADR[7:0]
8’h00
‘1’ ‘1’ ‘0’ ‘0’ ‘1’ ‘0’‘0’ ‘0’ 5 4 3 2 1 0 7 6 5 4 3 2 1 0 ‘0’‘0’ ‘0’ ‘0’ ‘0’ ‘0’ ’0’ ‘0’ ‘0’ ‘0’
SRD[7:0]
76543210
SRD[7:0]
76543210
S₂₈
SDI
t_P,SI
SDO
combinational
propagation
from SDI to SDO
35 of 76
Rev. 1.1 August 2006