K4Y50164UC Datasheet, PDF (54/76 Pages) Samsung semiconductor – 512Mbit XDR TM DRAM(C-die)

K4Y50164UC
K4Y50084UC
K4Y50044UC
K4Y50024UC
Figure 54 : XDR DRAM Block Diagram with Bank Sets
RQ11..0
12
XDR^TM DRAM
Odd
Bank Array
16x16^B*^a2^n6k*⁰2¹²
1
ACT
1
ACT
ROW
ROW
12
12
Bank 1
Bank(2³-1)
1
PRE
1
PRE
16x16*2⁶
16x16*2⁶
Sense Amp Array
16x16*2⁶ _R/W
1
1
R/W
Sense Amp 1
COL
COL
Sense Amp(2³-1)
6
6
16x16
S1[15:0][15:0]
16x16
COL
decode
63
COL logic
1:2 Demux
Reg
PRE
decode
3
PRE logic
ACT
decode
12 3
ACT logic
Even
Bank Array
16x16^B*^a2^n6k*⁰2¹²
1
ACT
1
ACT
12
12
ROW
ROW
1
PRE
1
PRE
Bank 0
Bank(2³-2)
16x16*2⁶
16x16*2⁶
Sense Amp Array
1
R/W ^16x16*26
1
R/W
COL
Sense Amp 0
6
6
COL
Sense Amp (2³-2)
16x16
16x16
S0[15:0][15:0]
WR odd
WR even
16x16
Byte Mask (WR)
Width Demux (WR)
16x16
D[15:0][15:0]
1:16 Demux
16
16
16/t_CC
RD even
RD odd
16x16
Width Mux (RD)
Q[15:0][15:0] 16x16
16:1 Mux
16
16
16/t_CC
16
DQ15..0
16
DQN15..0
54 of 76
Rev. 1.1 August 2006