HD64F3642AHV Datasheet, PDF (56/551 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 2 CPU
2.5.3 Logic Operations
Table 2.6 describes the four instructions that perform logic operations.
Table 2.6 Logic Operation Instructions
Instruction
AND
Size^*
B
OR
B
XOR
B
Function
Rd ∧ Rs → Rd, Rd ∧ #IMM → Rd
Performs a logical AND operation on a general register and another
general register or immediate data
Rd ∨ Rs → Rd, Rd ∨ #IMM → Rd
Performs a logical OR operation on a general register and another
general register or immediate data
Rd ⊕ Rs → Rd, Rd ⊕ #IMM → Rd
Performs a logical exclusive OR operation on a general register and
another general register or immediate data
NOT
B
~ Rd → Rd
Obtains the one’s complement (logical complement) of general
register contents
Notes: * Size: Operand size
B: Byte
2.5.4 Shift Operations
Table 2.7 describes the eight shift instructions.
Table 2.7 Shift Instructions
Instruction Size^*
Function
SHAL
B
SHAR
Rd shift → Rd
Performs an arithmetic shift operation on general register contents
SHLL
B
Rd shift → Rd
SHLR
Performs a logical shift operation on general register contents
ROTL
B
Rd rotate → Rd
ROTR
Rotates general register contents
ROTXL
B
ROTXR
Rd rotate → Rd
Rotates general register contents through the C (carry) bit
Notes: * Size: Operand size
B: Byte
Rev. 6.00 Sep 12, 2006 page 34 of 526
REJ09B0326-0600