HD64F3642AHV Datasheet, PDF (470/551 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Appendix B Internal I/O Registers
TCSRX—Timer control/status register X
H'F771
Timer X
Bit
Initial value
Read/Write
7
ICFA
0
R/(W)^*
6
ICFB
0
R/(W)^*
5
ICFC
0
R/(W)^*
4
ICFD
0
R/(W)^*
3
OCFA
0
R/(W)^*
2
OCFB
0
R/(W)^*
1
0
OVF CCLRA
0
0
R/(W)^* R/W
Counter clear A
0 FRC is not cleared by compare match A
1 FRC is cleared by compare match A
Timer overflow
0 [Clearing condition]
After reading OVF = 1, cleared by writing 0 to OVF
1 [Setting condition]
Set when the FRC value goes from H'FFFF to H'0000
Output compare flag B
0 [Clearing condition]
After reading OCFB = 1, cleared by writing 0 to OCFB
1 [Setting condition]
Set when FRC matches OCRB
Output compare flag A
0 [Clearing condition]
After reading OCFA = 1, cleared by writing 0 to OCFA
1 [Setting condition]
Set when FRC matches OCRA
Input capture flag D
0 [Clearing condition]
After reading ICFD = 1, cleared by writing 0 to ICFD
1 [Setting condition]
Set by input capture signal
Input capture flag C
0 [Clearing condition]
After reading ICFC = 1, cleared by writing 0 to ICFC
1 [Setting condition]
Set by input capture signal
Input capture flag B
0 [Clearing condition]
After reading ICFB = 1, cleared by writing 0 to ICFB
1 [Setting condition]
When the value of FRC is transferred to ICRB by the input
capture signal
Input capture flag A
0 [Clearing condition]
After reading ICFA = 1, cleared by writing 0 to ICFA
1 [Setting condition]
When the value of FRC is transferred to ICRA by the input
capture signal
Note: * Only a write of 0 for flag clearing is possible.
Rev. 6.00 Sep 12, 2006 page 448 of 526
REJ09B0326-0600