HD64F3642AHV Datasheet, PDF (496/551 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Appendix B Internal I/O Registers
AMR—A/D mode register
Bit
7
6
5
CKS TRGE —
Initial value
0
0
1
Read/Write
R/W
R/W
—
H'FFC4
A/D converter
4
3
2
1
0
—
CH3 CH2 CH1 CH0
1
0
0
0
0
—
R/W R/W R/W R/W
Channel select
Bit 3 Bit 2 Bit 1 Bit 0
CH3 CH2 CH1 CH0 Analog Input Channel
0
0
*
* ^{No channel selected}
1
0
0 AN ₀
1 AN ₁
1
0 AN ₂
1 AN ₃
1
0
0
0 AN ₄
1 AN ₅
1
0 AN ₆
1 AN ₇
1
0
0 Reserved
0
1 Reserved
1
0 Reserved
1
1 Reserved
* Don’t care
External trigger select
0 Disables start of A/D conversion by exter al trigger
1 Enables start of A/D conversion by rising or falling edge
of external trigger at pin ADTRG
Clock select
Bit 7
CKS Conversion Period
0 62/φ
1 31/φ
Conversion Time
φ = 2 MHz φ = 5 MHz
31 µs
15.5 µs
12.4 µs
—^*
Note: * Operation is not guaranteed if the conversion time is less than 12.4 µs.
Set bit 7 for a value of at least 12.4 µs.
Rev. 6.00 Sep 12, 2006 page 474 of 526
REJ09B0326-0600