HD64F3642AHV Datasheet, PDF (247/551 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 9 Timers
TCNTV Increment Timing: TCNTV is incremented by an input (internal or external) clock.
• Internal clock
One of six clocks (φ/128, φ/64, φ/32, φ/16, φ/8, φ/4) divided from the system clock (φ) can be
selected by bits CKS2 to CKS0 in TCRV0 and bit ICKS0 in TCRV1. Figure 9.4 shows the
timing.
φ
Internal
clock
FRC
input
TCNTV
input
TCNTV
N–1
N
N–1
Figure 9.4 Increment Timing with Internal Clock
• External clock
Incrementation on the rising edge, falling edge, or both edges of the external clock can be
selected by bits CKS2 to CKS0 in TCRV0.
The external clock pulse width should be at least 1.5 system clocks (φ) when a single edge is
counted, and at least 2.5 system clocks when both edges are counted. Shorter pulses will not be
counted correctly.
Figure 9.5 shows the timing when both the rising and falling edges of the external clock are
selected.
Rev. 6.00 Sep 12, 2006 page 225 of 526
REJ09B0326-0600