HD64F3642AHV Datasheet, PDF (102/551 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 3 Exception Handling
CCR I bit ← 1
Set port mode register bit
Execute NOP instruction
Clear interrupt request flag to 0
Interrupts masked. (Another possibility
is to disable the relevant interrupt in
interrupt enable register 1.)
After setting the port mode register bit,
first execute at least one instruction
(e.g., NOP), then clear the interrupt
request flag to 0
CCR I bit ← 0
Interrupt mask cleared
Figure 3.7 Port Mode Register Setting and Interrupt Request Flag
Clearing Procedure
Rev. 6.00 Sep 12, 2006 page 80 of 526
REJ09B0326-0600