HD64F3642AHV Datasheet, PDF (145/551 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 6 ROM
Table 6.10 System Clock Oscillation Frequencies Permitting Automatic Adjustment of
Chip (H8/3644F, H8/3643F, H8/3642AF) Bit Rate
Host Bit Rate^*
System Clock Oscillation Frequencies (fOSC) Permitting Automatic
Adjustment of Chip (H8/3644F, H8/3643F, H8/3642AF) Bit Rate
9600 bps
8 MHz to 16 MHz
4800 bps
4 MHz to 16 MHz
2400 bps
2 MHz to 16 MHz
Note: * Use a host bit rate setting of 2400, 4800, or 9600 bps only. No other setting should be
used.
RAM Area Allocation in Boot Mode: In boot mode, the 96-byte area from H'FB80 to H'FBDF
and the 18-byte area from H'FF6E to H'FF7F are reserved for boot program use, as shown in
figure 6.11. The area to which the user program is transferred is H'FBE0 to H'FF6D (910 bytes).
The boot program area becomes available when a transition is made to the execution state for the
user program transferred to RAM. A stack area should be set within the user program as required.
H'FB80
H'FBE0
Boot program
area*
(96 bytes)
User program
transfer area
(910 bytes)
H'FF6E
H'FF7F
Boot program
area*
(18 bytes)
Note: * These areas cannot be used until a transition is made to the execution state for the user
program transferred to RAM (i.e. a branch is made to RAM address H'FBE0). Note also
that the boot program remains in the boot program area in RAM (H'FB80 to H'FBDF,
H'FF6E to H'FF7F) even after control branches to the user program. When an interrupt
handling routine is executed in the boot program, the 16 bytes from H'FB80 to H'FB8F in
this area cannot be used. For details see section 6.7.9, Interrupt Handling during Flash
Memory Programming/Erasing.
Figure 6.11 RAM Areas in Boot Mode
Rev. 6.00 Sep 12, 2006 page 123 of 526
REJ09B0326-0600