HD64F3642AHV Datasheet, PDF (341/551 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 10 Serial Communication Interface
Receiving: Figure 10.13 shows an example of a flowchart for data reception. This procedure
should be followed for data reception after initializing SCI3.
Start
Read bits OER,
1 _{PER, FER in SSR}
OER + PER
Yes
+ FER = 1?
No
Read bit RDRF
2
in SSR
RDRF = 1?
Yes
Read receive
data in RDR
4
No
Receive error
processing
3
Continue data
reception?
No
Clear bit RE to
0 in SCR3
Yes
(A)
1. Read bits OER, PER, and FER in the
serial status register (SSR) to determine
if there is an error. If a receive error has
occurred, execute receive error
processing.
2. Read SSR and check that bit RDRF is
set to 1. If it is, read the receive data
in RDR. When the RDR data is read,
bit RDRF is cleared to 0 automatically.
3. When continuing data reception, finish
reading of bit RDRF and RDR before
receiving the stop bit of the current
frame. When the data in RDR is read,
bit RDRF is cleared to 0 automatically.
4. If a receive error has occurred, read bits
OER, PER, and FER in SSR to identify
the error, and after carrying out the
necessary error processing, ensure that
bits OER, PER, and FER are all cleared
to 0. Reception cannot be resumed if
any of these bits is set to 1. In the case
of a framing error, a break can be
detected by reading the value of the RXD
pin.4.
End
Figure 10.13 Example of Data Reception Flowchart (Asynchronous Mode)
Rev. 6.00 Sep 12, 2006 page 319 of 526
REJ09B0326-0600