HD64F3642AHV Datasheet, PDF (228/551 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 9 Timers
Register Configuration
Table 9.3 shows the register configuration of timer A.
Table 9.3 Timer A Registers
Name
Timer mode register A
Timer counter A
Abbr.
R/W
TMA
R/W
TCA
R
Initial Value
H'10
H'00
Address
H'FFB0
H'FFB1
9.2.2 Register Descriptions
Timer Mode Register A (TMA)
Bit
Initial value
Read/Write
7
6
5
4
3
2
1
0
TMA7 TMA6 TMA5

TMA3 TMA2 TMA1 TMA0
0
0
0
1
0
0
0
0
R/W
R/W
R/W

R/W
R/W
R/W
R/W
TMA is an 8-bit read/write register for selecting the prescaler, input clock, and output clock.
Upon reset, TMA is initialized to H'10.
Bits 7 to 5Clock Output Select (TMA7 to TMA5): Bits 7 to 5 choose which of eight clock
signals is output at the TMOW pin. The system clock divided by 32, 16, 8, or 4 can be output in
active mode and sleep mode. A 32.768 kHz signal divided by 32, 16, 8, or 4 can be output in
active mode, sleep mode, and subactive mode.
Bit 7: TMA7
0
1
Bit 6: TMA6
0
1
0
1
Bit 5: TMA5
0
1
0
1
0
1
0
1
Clock Output
φ/32
φ/16
φ/8
φ/4
φW/32
φW/16
φW/8
φW/4
(initial value)
Rev. 6.00 Sep 12, 2006 page 206 of 526
REJ09B0326-0600