HD64F3642AHV Datasheet, PDF (300/551 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 10 Serial Communication Interface
Features
• Choice of 8-bit or 16-bit data length
• Choice of eight internal clock sources (φ/1024, φ/256, φ/64, φ/32, φ/16, φ/8, φ/4, φ/2) or an
external clock
• Interrupt requested at completion of transfer
• Choice of HOLD mode or LATCH mode in SSB mode.
Block Diagram
Figure 10.1 shows a block diagram of SCI1.
φ
PSS
SCK₁
SI₁
Transmit/receive
control circuit
SCR1
SCSR1
Transfer bit counter
SDRU
SDRL
SO₁
Legend:
SCR1: Serial control register 1
SCSR1: Serial control/status register 1
SDRU: Serial data register U
SDRL: Serial data register L
IRRS1: SCI1 interrupt request flag
PSS: Prescaler S
Figure 10.1 SCI1 Block Diagram
Rev. 6.00 Sep 12, 2006 page 278 of 526
REJ09B0326-0600
IRRS1