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HD64F3642AHV Datasheet, PDF (178/551 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents
Section 6 ROM
Table 6.16 AC Characteristics in PROM Mode
(Conditions: VCC = 5.0 V ±10%, VPP = 12.0 V ±0.6 V, VSS = 0 V, Ta = 25°C ±5°C)
Item
Test
Symbol Min Typ Max Unit Conditions
Command write cycle
Address setup time
tCWC
tAS
120 

ns Figure 6.20
0


ns Figure 6.21*
Address hold time
tAH
60


ns Figure 6.22
Data setup time
tDS
50


ns
Data hold time
tDH
10


ns
CE setup time
tCES
0


ns
CE hold time
tCEH
0


ns
VPP setup time
tVPS
100 

ns
VPP hold time
tVPH
100 

ns
WE programming pulse width
tWEP
70


ns
WE programming pulse high time
tWEH
40


ns
OE setup time before command write tOEWS
0


ns
OE setup time before verify
tOERS
6


µs
Verify access time
tVA


500 ns
OE setup time before status polling tOEPS
120 

ns
Status polling access time
tSPA


120 ns
Program wait time
tPPW
25


µs
Erase wait time
tET
9

11
ms
Output disable time
tDF
0

40
ns
Total auto-erase time
tAET
0.5 
30
s
Notes: The CE, OE, and WE pins should be driven high during transitions of VPP from 5 V to 12 V
and from 12 V to 5 V.
* Input pulse level: 0.45 V to 2.4 V
Input rise time and fall time ≤ 10 ns
Timing reference levels: 0.8 V and 2.0 V for input; 0.8 V and 2.0 V for output
Rev. 6.00 Sep 12, 2006 page 156 of 526
REJ09B0326-0600