HD64F3642AHV Datasheet, PDF (42/551 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 2 CPU
Refer to the H8/300L Series Programming Manual for the action of each instruction on the flag
bits.
2.2.3 Initial Register Values
In reset exception handling, the program counter (PC) is initialized by a vector address (H'0000)
load, and the I bit in the CCR is set to 1. The other CCR bits and the general registers are not
initialized. In particular, the stack pointer (R7) is not initialized. The stack pointer should be
initialized by software, by the first instruction executed after a reset.
2.3 Data Formats
The H8/300L CPU can process 1-bit data, 4-bit (BCD) data, 8-bit (byte) data, and 16-bit (word)
data.
The H8/300L CPU can process 1-bit, 4-bit BCD, 8-bit (byte), and 16-bit (word) data. 1-bit data is
handled by bit manipulation instructions, and is accessed by being specified as bit n (n = 0, 1, 2, ...
7) in the operand data (byte).
Byte data is handled by all arithmetic and logic instructions except ADDS and SUBS. Word data
is handled by the MOV.W, ADD.W, SUB.W, CMP.W, ADDS, SUBS, MULXU (b bits × 8 bits),
and DIVXU (16 bits ÷ 8 bits) instructions.
With the DAA and DAS decimal adjustment instructions, byte data is handled as two 4-bit BCD
data units.
Rev. 6.00 Sep 12, 2006 page 20 of 526
REJ09B0326-0600