HD64F3642AHV Datasheet, PDF (255/551 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 9 Timers
Contention between TCNTV Write and Increment: If a TCNTV increment clock signal is
generated in the T₃ state of a TCNTV write cycle, the write takes precedence and the counter is
not incremented. Figure 9.14 shows the timing.
TCNTV write cycle by CPU
T₁
T₂
T₃
φ
Address
Internal write
signal
TCNTV clock
TCNTV address
TCNTV
N
M
TCNTV write data
Figure 9.14 Contention between TCNTV Write and Increment
Rev. 6.00 Sep 12, 2006 page 233 of 526
REJ09B0326-0600