HD64F3642AHV Datasheet, PDF (317/551 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 10 Serial Communication Interface
Bit 6Character Length (CHR): Bit 6 selects either 7 or 8 bits as the data length to be used in
asynchronous mode. In synchronous mode the data length is always 8 bits, irrespective of the bit 6
setting.
Bit 6: CHR
Description
0
8-bit data
1
7-bit data^*
Note: * When 7-bit data is selected, the MSB (bit 7) of TDR is not transmitted.
(initial value)
Bit 5Parity Enable (PE): Bit 5 selects whether a parity bit is to be added during transmission
and checked during reception in asynchronous mode. In synchronous mode parity bit addition and
checking is not performed, irrespective of the bit 5 setting.
Bit 5: PE
Description
0
Parity bit addition and checking disabled
1
Parity bit addition and checking enabled^*
(initial value)
Note: * When PE is set to 1, even or odd parity, as designated by bit PM, is added to transmit
data before it is sent, and the received parity bit is checked against the parity
designated by bit PM.
Bit 4Parity Mode (PM): Bit 4 selects whether even or odd parity is to be used for parity
addition and checking. The PM bit setting is only valid in asynchronous mode when bit PE is set
to 1, enabling parity bit addition and checking. The PM bit setting is invalid in synchronous mode,
and in asynchronous mode if parity bit addition and checking is disabled.
Bit 4: PM
Description
0
Even parity^*1
(initial value)
1
Odd parity^*2
Notes: 1. When even parity is selected, a parity bit is added in transmission so that the total
number of 1 bits in the transmit data plus the parity bit is an even number; in reception,
a check is carried out to confirm that the number of 1 bits in the receive data plus the
parity bit is an even number.
2. When odd parity is selected, a parity bit is added in transmission so that the total
number of 1 bits in the transmit data plus the parity bit is an odd number; in reception, a
check is carried out to confirm that the number of 1 bits in the receive data plus the
parity bit is an odd number.
Rev. 6.00 Sep 12, 2006 page 295 of 526
REJ09B0326-0600