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Section 4 Clock Pulse Generators
Section 4 Clock Pulse Generators
4.1 Overview
Clock oscillator circuitry (CPG: clock pulse generator) is provided on-chip, including both a
system clock pulse generator and a subclock pulse generator. The system clock pulse generator
consists of a system clock oscillator and system clock dividers. The subclock pulse generator
consists of a subclock oscillator circuit and a subclock divider.
4.1.1 Block Diagram
Figure 4.1 shows a block diagram of the clock pulse generators.
OSC₁
OSC₂
X₁
X₂
System clock ^φOSC System clock
oscillator
divider (1/2)
(f _OSC)
System clock pulse generator
Subclock
oscillator
φ _W ^Subclock
divider
(f_W) _{(1/2, 1/4, 1/8)}
φ_OSC/2
φ_OSC/128
System clock
divider
φ_OSC/64
(1/64, 1/32, ^φOSC^/32
1/16, 1/8) φ_OSC/16
φ _W/2
φ _W/4
φ _W/8
φ
Prescaler S
(13 bits)
φ _SUB
Subclock pulse generator
Prescaler W
(5 bits)
Figure 4.1 Block Diagram of Clock Pulse Generators
φ/2
to
φ/8192
φ_W /2
φ_W /4
φ_W /8
to
φ_W /128
4.1.2 System Clock and Subclock
The basic clock signals that drive the CPU and on-chip peripheral modules are φ and φ_SUB. Four of
the clock signals have names: φ is the system clock, φ_SUB is the subclock, φ_OSC is the oscillator
clock, and φ_W is the watch clock.
The clock signals available for use by peripheral modules are φ/2, φ/4, φ/8, φ/16, φ/32, φ/64,
φ/128, φ/256, φ/512, φ/1024, φ/2048, φ/4096, φ/8192, φ_W/2, φ_W/4, φ_W/8, φ_W/16, φ_W/32, φ_W/64, and
φ_W/128. The clock requirements differ from one module to another.
Rev. 6.00 Sep 12, 2006 page 81 of 526
REJ09B0326-0600