MC68HC908KX8 Datasheet, PDF (92/310 Pages) Motorola, Inc – Microcontrollers

System Integration Module (SIM)
Technical Data
92
A module that is active during wait mode can wake up the CPU with an
interrupt if the interrupt is enabled. Stacking for the interrupt begins one
cycle after the WAIT instruction during which the interrupt occurred.
Refer to the wait mode subsection of each module to see if the module
is active or inactive in wait mode. Some modules can be programmed to
be active in wait mode.
Wait mode can also be exited by a reset. If the COP disable bit, COPD,
in the configuration register is logic 0, then the computer operating
properly module (COP) is enabled and remains active in wait mode.
IAB
WAIT ADDR
WAIT ADDR + 1
SAME
SAME
IDB
PREVIOUS DATA
NEXT OPCODE
SAME
SAME
R/:
Note: Previous data can be operand data or the WAIT opcode, depending on the last instruction.
Figure 6-11. Wait Mode Entry Timing
Figure 6-12 and Figure 6-13 show the timing for WAIT recovery.
IAB
$DE0B
$DE0C $00FF
$00FE
$00FD
$00FC
IDB $A6 $A6
$A6
$01
$0B
$DE
EXITSTOPWAIT
Note: EXITSTOPWAIT = CPU interrupt
Figure 6-12. Wait Recovery from Interrupt
IAB
$DE0B
64
&<&/(6
RST VCT H RST VCT L
IDB $A6 $A6
$A6
IRST
CGMXCLK
Figure 6-13. Wait Recovery from Internal Reset
MC68HC908KX8 • MC68HC908KX2 • MC68HC08KX8 — Rev. 1.0
System Integration Module (SIM)
MOTOROLA