MC68HC908KX8 Datasheet, PDF (254/310 Pages) Motorola, Inc – Microcontrollers

Analog-to-Digital Converter (ADC)
Table 17-2. ADC Clock Divide Ratio
ADIV2
ADIV1
0
0
0
0
0
1
0
1
1
X
X = don’t care
ADIV0
0
1
0
1
X
ADC Clock Rate
ADC input clock ÷ 1
ADC input clock ÷ 2
ADC input clock ÷ 4
ADC input clock ÷ 8
ADC input clock ÷ 16
ADICLK — ADC Input Clock Select Bit
ADICLK selects either bus clock or the oscillator output clock
(CGMXCLK) as the input clock source to generate the internal ADC
rate clock. Reset selects CGMXCLK as the ADC clock source.
1 = Internal bus clock
0 = Oscillator output clock (CGMXCLK)
The ADC requires a clock rate of approximately 1 MHz for correct
operation. If the selected clock source is not fast enough, the ADC will
generate incorrect conversions. See 20.10 Trimmed Accuracy of
the Internal Clock Generator.
f_ADIC
=Ã^f^CG^M^XC^LK^or^b^us^fr^eq^ue^nc^y
ADIV[2:0]
≅
1
MHz
NOTE: During the conversion process, changing the ADC clock will result in an
incorrect conversion.
Technical Data
254
MC68HC908KX8 • MC68HC908KX2 • MC68HC08KX8 — Rev. 1.0
Analog-to-Digital Converter (ADC)
MOTOROLA