MC68HC908KX8 Datasheet, PDF (237/310 Pages) Motorola, Inc – Microcontrollers

Timer Interface Module (TIM)
I/O Registers
16.8.2 TIM Counter Registers
The two read-only TIM counter registers (TCNTH and TCNTL) contain
the high and low bytes of the value in the TIM counter. Reading the high
byte (TCNTH) latches the contents of the low byte (TCNTL) into a buffer.
Subsequent reads of TCNTH do not affect the latched TCNTL value until
TCNTL is read. Reset clears the TIM counter registers. Setting the TIM
reset bit (TRST) also clears the TIM counter registers.
Register name and address: TCNTH — $0021
Bit 7
6
5
4
3
2
Read: Bit 15
14
13
12
11
10
Write:
Reset: 0
0
0
0
0
0
1
Bit 0
9
Bit 8
0
0
Register name and address: TCNTL — $0022
Bit 7
6
5
4
3
2
1
Bit 0
Read: Bit 7
6
5
4
3
2
1
Bit 0
Write:
Reset: 0
0
0
0
0
0
0
0
= Unimplemented
Figure 16-5. TIM Counter Registers (TCNTH and TCNTL)
MC68HC908KX8 • MC68HC908KX2 • MC68HC08KX8 — Rev. 1.0
MOTOROLA
Timer Interface Module (TIM)
Technical Data
237