MC68HC908KX8 Datasheet, PDF (43/310 Pages) Motorola, Inc – Microcontrollers

Memory Map
I/O Registers
Addr. Register Name
Bit 7
6
Timer Channel 1 Register ^Read: _{Bit 7}
6
$002A
Low (TCH1L) Write:
See page 243. _Reset:
$002B
Unimplemented
↓
↓
$0035
Unimplemented
5
4
3
2
5
4
3
2
Indeterminate after reset
1
Bit 0
1
Bit 0
$0036
ICG Control Register ^Read:
(ICGCR) Write:
See page 131. _Reset:
CMIE
0
CMF
CMON
0*
0
0
*See 7.8.1 ICG Control Register for method of clearing the CMF bit.
ICG Multiplier Register ^Read:
$0037
(ICGMR) Write:
See page 133. _{Reset: 0}
N6
N5
0
0
$0038
ICG Trim Register ^Read:
(ICGTR) Write:
See page 134. _Reset:
TRIM7
1
TRIM6
0
TRIM5
0
ICG Divider Control ^Read:
$0039
Register (ICGDVR) Write:
See page 134. _{Reset: 0}
0
0
$003A
ICG DCO Stage Control ^Read:
Register (ICGDSR) Write:
See page 135. _Reset:
DSTG7
R
U
DSTG6
R
U
DSTG5
R
U
$003B
Reserved
R
R
R
CS
0
N4
1
TRIM4
0
0
DSTG4
R
U
R
ICGON
1
N3
0
TRIM3
0
DDIV3
U
DSTG3
R
U
R
ICGS
0
N2
1
TRIM2
0
DDIV2
U
DSTG2
R
U
R
ECGON
0
N1
0
TRIM1
0
DDIV1
U
DSTG1
R
U
R
ECGS
0
N0
1
TRIM0
0
DDIV0
U
DSTG0
R
U
R
$003C
$003D
Analog-to-Digital Status ^Read:
and Control Register Write:
(ADSCR) See page 251. _Reset:
COCO
R
0
Analog-to-Digital Data ^{Read: AD7}
Register (ADR) Write: R
See page 253. _Reset:
AIEN ADCO ADCH4 ADCH3 ADCH2 ADCH1 ADCH0
0
0
1
1
1
AD6
AD5
AD4
AD3
AD2
R
R
R
R
R
Indeterminate after reset
= Unimplemented
R = Reserved
1
1
AD1
AD0
R
R
U = Unaffected
Figure 2-2. Control, Status, and Data Registers (Sheet 5 of 7)
MC68HC908KX8 • MC68HC908KX2 • MC68HC08KX8 — Rev. 1.0
MOTOROLA
Memory Map
Technical Data
43