MC68HC908KX8 Datasheet, PDF (88/310 Pages) Motorola, Inc – Microcontrollers

System Integration Module (SIM)
6.6.1 Interrupts
At the beginning of an interrupt, the CPU saves the CPU register
contents on the stack and sets the interrupt mask (I bit) to prevent
additional interrupts. At the end of an interrupt, the return-from-interrupt
(RTI) instruction recovers the CPU register contents from the stack so
that normal processing can resume. Figure 6-7 shows interrupt entry
timing. Figure 6-8 shows interrupt recovery timing.
Interrupts are latched, and arbitration is performed in the SIM at the start
of interrupt processing. The arbitration result is a constant that the CPU
uses to determine which vector to fetch. As shown in Figure 6-9, once
an interrupt is latched by the SIM, no other interrupt can take
precedence, regardless of priority, until the latched interrupt is serviced
or the I bit is cleared.
MODULE
INTERRUPT
I BIT
IAB
IDB
R/:
DUMMY
SP
SP – 1 SP – 2 SP – 3 SP – 4 VECT H VECT L START ADDR
DUMMY PC – 1[7:0] PC – 1[15:8] X
A
CCR V DATA H V DATA L OPCODE
Figure 6-7. Interrupt Entry
MODULE
INTERRUPT
I BIT
IAB
IDB
R/:
Technical Data
88
SP – 4 SP – 3 SP – 2 SP – 1
SP
PC
PC + 1
CCR
A
X PC – 1 [7:0] PC – 1 [15:8] OPCODE OPERAND
Figure 6-8. Interrupt Recovery
MC68HC908KX8 • MC68HC908KX2 • MC68HC08KX8 — Rev. 1.0
System Integration Module (SIM)
MOTOROLA