MC68HC908KX8 Datasheet, PDF (50/310 Pages) Motorola, Inc – Microcontrollers

FLASH Memory
4.3 Functional Description
The FLASH memory is an array of 7,680 bytes with an additional 36
bytes of user vectors and one byte used for block protection.
NOTE: An erased bit reads as logic 1 and a programmed bit reads as logic 0.
The program and erase operations are facilitated through control bits in
the FLASH control register (FLCR). See 4.4 FLASH Control Register.
The FLASH is organized internally as an 8192-word by 8-bit
complementary metal-oxide semiconductor (CMOS) page erase, byte
(8-bit) program embedded FLASH memory. Each page consists of 64
bytes. The page erase operation erases all words within a page. A page
is composed of two adjacent rows.
A security feature prevents viewing of the FLASH contents.⁽¹⁾
4.4 FLASH Control Register
The FLASH control register (FLCR) controls FLASH program and erase
operations.
Address: $FE08
Bit 7
6
5
4
3
2
1
Bit 0
Read: 0
0
0
0
HVEN MASS ERASE PGM
Write:
Reset: 0
0
0
0
0
0
0
0
= Unimplemented
Figure 4-1. FLASH Control Register (FLCR)
Technical Data
50
1. No security feature is absolutely secure. However, Motorola’s strategy is to make reading
or copying the FLASH difficult for unauthorized users.
MC68HC908KX8 • MC68HC908KX2 • MC68HC08KX8 — Rev. 1.0
FLASH Memory
MOTOROLA