MC68HC908KX8 Datasheet, PDF (216/310 Pages) Motorola, Inc – Microcontrollers

Timebase Module (TBM)
15.3 Features
Features of the TBM module include:
• Software configurable periodic interrupts with divide-by-8, 16, 128,
256, 1024, 2048, 4096, and 32,768 taps of the selected clock
source
• Configurable for operation during stop mode to allow periodic
wake up from stop
15.4 Functional Description
This module can generate a periodic interrupt by dividing the clock
source supplied from the internal clock generator module, TBMCLK.
Note that this clock source is the external clock ECLK when the ECGON
bit in the ICG control register (ICGCR) is set. Otherwise, TBMCLK is
driven at the internally generated clock frequency (ICLK). In other words,
if the external clock is enabled it will be used as the TBMCLK, even if the
MCU bus clock is based on the internal clock.
The counter is initialized to all 0s when TBON bit is cleared. The counter,
shown in Figure 15-1, starts counting when the TBON bit is set. When
the counter overflows at the tap selected by TBR2–TBR0, the TBIF bit
gets set. If the TBIE bit is set, an interrupt request is sent to the CPU.
The TBIF flag is cleared by writing a 1 to the TACK bit. The first time the
TBIF flag is set after enabling the timebase module, the interrupt is
generated at approximately half of the overflow period. Subsequent
events occur at the exact period.
The timebase module may remain active after execution of the STOP
instruction if the internal clock generator has been enabled to operate
during stop mode through the OSCENINSTOP bit in the configuration
register. The timebase module can be used in this mode to generate a
periodic wakeup from stop mode.
Technical Data
216
MC68HC908KX8 • MC68HC908KX2 • MC68HC08KX8 — Rev. 1.0
Timebase Module (TBM)
MOTOROLA