MC68HC908KX8 Datasheet, PDF (45/310 Pages) Motorola, Inc – Microcontrollers

Memory Map
Monitor ROM
Addr. Register Name
Bit 7
6
5
4
3
2
1
Bit 0
FLASH Control Register ^{Read: 0}
0
0
0
HVEN MARGIN ERASE PGM
$FE08
(FLCR) Write:
See page 50. _{Reset: 0}
0
0
0
0
0
0
0
Break Addres Register ^Read: _{Bit 15}
14
13
12
11
10
$FE09
High (BRKH) Write:
See page 274. _{Reset: 0}
0
0
0
0
0
9
Bit 8
0
0
Break Addres Register ^Read: _{Bit 7}
6
5
4
3
2
1
Bit 0
$FE0A
Low (BRKL) Write:
See page 274. _{Reset: 0}
0
0
0
0
0
0
0
Break Status and Control ^Read: _{BRKE BRKA}
0
0
0
0
0
0
$FE0B
Register (BRKSCR) Write:
See page 273. _{Reset: 0}
0
0
0
0
0
0
0
LVI Status Register ^{Read: LVIOUT}
0
0
0
0
0
0
R
$FE0C
(LVISR) Write:
See page 141. _{Reset: 0}
0
0
0
0
0
0
0
$FF7E
FLASH Block Protect ^Read:
Register (FLBPR)⁽¹⁾ Write:
See page 57. _Reset:
BPR7
BPR6
BPR5 BPR4 BPR3 BPR2
Unaffected by reset
BPR1
BPR0
1. Non-volatile FLASH register
$FFFF
COP Control Register ^Read:
(COPCTL) Write:
See page 163. _Reset:
Low byte of reset vector
Writing clears COP counter (any value)
Unaffected by reset
= Unimplemented
R = Reserved
U = Unaffected
Figure 2-2. Control, Status, and Data Registers (Sheet 7 of 7)
2.4 Monitor ROM
The 295 bytes at addresses $FE20–$FF46 are reserved ROM
addresses that contain the instructions for the monitor functions.
MC68HC908KX8 • MC68HC908KX2 • MC68HC08KX8 — Rev. 1.0
MOTOROLA
Memory Map
Technical Data
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