MC68HC908KX8 Datasheet, PDF (78/310 Pages) Motorola, Inc – Microcontrollers

System Integration Module (SIM)
6.8 SIM Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .94
6.8.1 SIM Reset Status Register . . . . . . . . . . . . . . . . . . . . . . . . . 95
6.8.2 Interrupt Status Registers. . . . . . . . . . . . . . . . . . . . . . . . . . . 96
6.8.2.1
6.8.2.2
Interrupt Status Register 1 . . . . . . . . . . . . . . . . . . . . . . . .97
Interrupt Status Register 2 . . . . . . . . . . . . . . . . . . . . . . . .97
6.8.2.3 Interrupt Status Register 3 . . . . . . . . . . . . . . . . . . . . . . . .98
6.2 Introduction
This section describes the system integration module (SIM), which
supports up to 24 external and/or internal interrupts. The SIM is a system
state controller that coordinates the central processor unit (CPU) and
exception timing. Together with the CPU, the SIM controls all
microcontroller unit (MCU) activities.
A block diagram of the SIM is shown in Figure 6-1. Figure 6-2 is a
summary of the SIM input/output (I/O) registers.
The SIM is responsible for:
• Bus clock generation and control for CPU and peripherals:
– Stop/wait/reset entry and recovery
– Internal clock control
• Master reset control, including power-on reset (POR) and
computer operating properly (COP) timeout
• Interrupt control:
– Acknowledge timing
– Arbitration control timing
– Vector address generation
• CPU enable/disable timing
• Modular architecture expandable to 128 interrupt sources
Technical Data
78
MC68HC908KX8 • MC68HC908KX2 • MC68HC08KX8 — Rev. 1.0
System Integration Module (SIM)
MOTOROLA