MC68HC908KX8 Datasheet, PDF (301/310 Pages) Motorola, Inc – Microcontrollers

MC68HC08KX8 Overview
Configuration Register Programming
For specific information see:
• FLASH — Section 4. FLASH Memory
• ICG — 7.7 CONFIG or MOR Options
• LVI — 8.4 Functional Description
• PORT — 10.4.1 Port B Data Register
• COP — 11.5.7 COPD (COP Disable) and 11.5.8 COPRS (COP
Rate Select)
• CONFIG — 9.3 Functional Description
NOTE:
The user must keep in mind that these notes are not entirely applicable
to the MOR found in the ROM version. The MOR bits can neither
assume the described CONFIG default values after reset nor can they
be modified later under user code control. While the MOR is mask
defined, and consequently unwritable, CONFIG can be written once
after each reset.
Address: $001E
Bit 7
6
5
4
3
2
1
Read:
R
Write:
LVI2
EXT-
EXT-
EXT-
XTALEN SLOW CLKEN
0
OSCEIN-
STOP
Reset:
Unaffected by reset
R = Reserved
Figure B-2. Mask Option Register 2 (MOR2)
Bit 0
SCIBD-
SRC
Address: $001F
Bit 7
6
5
4
3
2
1
Read:
COPRS LVISTOP LVIRSTD
Write:
LVIP-
WRD
LVI5OR3 SSREC
STOP
Reset:
Unaffected by reset
Figure B-3. Mask Option Register 1 (MOR1)
Bit 0
COPD
NOTE:
With the FLASH charge pump eliminated, MOR2 bit 2 (originally
PMPREGD in CONFIG) has no effect. Reading this bit will return 0.
For a complete description of other configuration bits, refer to
9.3 Functional Description.
MC68HC908KX8 • MC68HC908KX2 • MC68HC08KX8 — Rev. 1.0
MOTOROLA
MC68HC08KX8 Overview
Technical Data
301