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MC68HC908KX8 Datasheet, PDF (217/310 Pages) Motorola, Inc – Microcontrollers
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FROM ICG MODULE
÷2
÷2
÷2
÷2
Timebase Module (TBM)
Interrupts
TBON
÷2 ÷2 ÷2 ÷2
÷2 ÷2
÷2 ÷2
TBMINT
000
001
010
011
100
101
110
111
Figure 15-1. Timebase Block Diagram
TBIF
TBIE
R
15.5 Interrupts
The timebase module can periodically interrupt the CPU with a rate
defined by the selected TBMCLK and the select bits TBR2–TBR0. When
the timebase counter chain rolls over, the TBIF flag is set. If the TBIE bit
is set, enabling the timebase interrupt, the counter chain overflow will
generate a CPU interrupt request.
Interrupts must be acknowledged by writing a logic 1 to the TACK bit.
MC68HC908KX8 • MC68HC908KX2 • MC68HC08KX8 — Rev. 1.0
MOTOROLA
Timebase Module (TBM)
Technical Data
217