MC68HC908KX8 Datasheet, PDF (41/310 Pages) Motorola, Inc – Microcontrollers

Memory Map
I/O Registers
Addr. Register Name
Bit 7
6
5
4
3
2
1
Bit 0
SCI Status Register 2 ^{Read: 0}
0
0
0
0
0
BKF
RPF
$0017
(SCS2) Write:
See page 210. _{Reset: 0}
0
0
0
0
0
0
0
$0018
SCI Data Register ^{Read: R7}
R6
R5
R4
R3
R2
R1
R0
(SCDR) Write: T7
T6
T5
T4
T3
T2
T1
T0
See page 211. _Reset:
Unaffected by reset
SCI Baud Rate Register ^{Read: 0}
$0019
(SCBR) Write:
See page 211. _{Reset: 0}
0
SCP1 SCP0
R
SCR2 SCR1 SCR0
0
0
0
0
0
0
0
Keyboard Status and Read: 0
0
0
0
KEYF
0
$001A
Control Register (KBSCR)
See page 177.
Write:
IMASKK MODEK
ACKK
Reset: 0
0
0
0
0
0
0
0
Keyboard Interrupt Enable ^{Read: 0}
0
0
KBIE4 KBIE3 KBIE2 KBIE1 KBIE0
$001B
Register (KBIER) Write:
See page 178. _{Reset: 0}
0
0
0
0
0
0
0
$001C
Timebase Control Read: TBIF
0
Register (TBCR)
See page 220.
Write:
TBR2 TBR1 TBR0
TBIE TBON
R
TACK
Reset: 0
0
0
0
0
0
0
0
IRQ Status and Control ^{Read: 0}
0
0
0
IRQF1
0
IMASK1 MODE1
$001D
Register (ISCR) Write: R
R
R
R
R
ACK1
See page 169. _{Reset: 0}
0
0
0
0
0
0
0
Configuration Register 2^{(1) Read:}
R
$001E
(CONFIG2) Write:
See page 144.
Reset: 0
0
EXT- EXT- EXT-
XTALEN SLOW CLKEN
0
OSCE-
NIN-
STOP
SCIBD-
SRC
0
0
0
0
0
0
0
$001F
Configuration Register 1⁽¹⁾
(CONFIG1) See page 144.
Read:
Write:
COPRS
LVISTOP LVIRSTD LVIPWRD LVI5OR3
SSREC
STOP
COPD
POR Reset: 0
0
0
0
0
0
0
0
Other Resets: 0
0
0
0
U
0
0
0
1. LVI5OR3 is only writable after a power-on reset (POR). Bit 6 of CONFIG1 is read-only and will read 0.
All other bits in CONFIG1 and CONFIG2 are one-time writable after any reset.
= Unimplemented
R = Reserved
U = Unaffected
Figure 2-2. Control, Status, and Data Registers (Sheet 3 of 7)
MC68HC908KX8 • MC68HC908KX2 • MC68HC08KX8 — Rev. 1.0
MOTOROLA
Memory Map
Technical Data
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