MC68HC908KX8 Datasheet, PDF (153/310 Pages) Motorola, Inc – Microcontrollers

Input/Output (I/O) Ports
Port A
READ DDRA ($0004)
WRITE DDRA ($0004)
RESET
DDRAx
WRITE PTA ($0000)
PTAPUEx
READ PTA ($0000)
PTAx
V_DD
INTERNAL
PULLUP
DEVICE
PTAx
Figure 10-4. Port A I/O Circuit
When bit DDRAx is a logic 1, reading address $0000 reads the PTAx
data latch. When bit DDRAx is a logic 0, reading address $0000 reads
the voltage level on the pin. The data latch can always be written,
regardless of the state of its data direction bit. Table 10-1 summarizes
the operation of the port A pins.
Table 10-1. Port A Pin Functions
PTAPUE
Bit
DDRA PTA
Bit
Bit
I/O Pin
Mode
1
0
X
Input, V_DD(1)
0
0
X
Input, Hi-Z
X
1
X
Output
X = Don’t care
Hi-Z = High impedance
1. I/O pin pulled up to V_DD by internal pulllup device
2. Writing affects data register, but does not affect input.
Accesses
to DDRA
Read/Write
DDRA4–DDRA0
DDRA4–DDRA0
DDRA4–DDRA0
Accesses to PTA
Read
Pin
Pin
PTA4–PTA0
Write
PTA4–PTA0⁽²⁾
PTA4–PTA0⁽³⁾
PTA4–PTA0
MC68HC908KX8 • MC68HC908KX2 • MC68HC08KX8 — Rev. 1.0
MOTOROLA
Input/Output (I/O) Ports
Technical Data
153