MC68HC908KX8 Datasheet, PDF (83/310 Pages) Motorola, Inc – Microcontrollers

System Integration Module (SIM)
Reset and System Initialization
6.4.1 Active Resets from Internal Sources
An internal reset can be caused by an illegal address, illegal opcode,
COP timeout, LVI, POR, or MENRST as shown in Figure 6-4.
NOTE:
For LVI or POR resets, the SIM cycles through 4096 CGMXCLK cycles
during which the SIM asserts IRST. The internal reset signal then follows
with the 64-cycle phase as shown in Figure 6-5.
The COP reset is asynchronous to the bus clock.
ILLEGAL ADDRESS RST
ILLEGAL OPCODE RST
COPRST
LVI
POR
MENRST
INTERNAL RESET
Figure 6-4. Sources of Internal Reset
IRST
CGMXCLK
IAB
64 CYCLES
VECTOR HIGH
Figure 6-5. Internal Reset Timing
MC68HC908KX8 • MC68HC908KX2 • MC68HC08KX8 — Rev. 1.0
MOTOROLA
System Integration Module (SIM)
Technical Data
83