MC68HC908KX8 Datasheet, PDF (155/310 Pages) Motorola, Inc – Microcontrollers

Input/Output (I/O) Ports
Port B
10.4.1 Port B Data Register
The port B data register (PTB) contains a data latch for each of the eight
port B pins.
Address: $0001
Bit 7
6
5
4
3
2
1
Read:
PTB7
Write:
PTB6
PTB5
PTB4
PTB3
PTB2
PTB1
Reset:
Unaffected by reset
Alternate
Function:
OSC2
OSC1
TxD
RxD
AD3
AD2
AD1
Figure 10-6. Port B Data Register (PTB)
Bit 0
PTB0
AD0
PTB7–PTB0 — Port B Data Bits
These read/write bits are software-programmable. Data direction of
each port B pin is under the control of the corresponding bit in data
direction register B. Reset has no effect on port B data.
OSC2 and OSC1 — OSC2 and OSC1 Bits
Under software control, PTB7 and PTB6 can be configured as
external clock inputs and outputs. PTB7 will become an output clock,
OSC2, if selected in the configuration registers and enabled in the
ICG registers. PTB6 will become an external input clock source,
OSC1, if selected in the configuration registers and enabled in the
ICG registers. See Section 7. Internal Clock Generator Module
(ICG) and Section 9. Configuration Register (CONFIG).
RxD — SCI Receive Data Input Bit
The PTB1/RxD pin is the receive data input for the SCI module.
When the enable SCI bit, ENSCI, is clear, the SCI module is disabled,
and the PTB1/RxD pin is available for general-purpose I/O. See
Section 14. Serial Communications Interface Module (SCI).
MC68HC908KX8 • MC68HC908KX2 • MC68HC08KX8 — Rev. 1.0
MOTOROLA
Input/Output (I/O) Ports
Technical Data
155