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MC68HC908KX8 Datasheet, PDF (267/310 Pages) Motorola, Inc – Microcontrollers
Monitor ROM (MON)
Security
VDD
IRST
PTA1
PTA0
4096 + 64 CGMXCLK CYCLES
24 CGMXCLK CYCLES
256 CGMXCLK CYCLES (ONE BIT TIME)
FROM HOST
FROM MCU
1
4
1
1
2
4
1
Notes: 1 = Echo delay (2 bit times)
2 = Data return delay (2 bit times)
4 = Wait 1 bit time before sending next byte.
Figure 18-7. Monitor Mode Entry Timing
If the received bytes match those at locations $FFF6–$FFFD, the host
bypasses the security feature and can read all FLASH locations and
execute code from FLASH. Security remains bypassed until a reset
occurs. After any reset, security will be locked. To bypass security again,
the host must resend the eight security bytes on PTA0.
If the received bytes do not match the data at locations $FFF6–$FFFD,
the host fails to bypass the security feature. The MCU remains in monitor
mode, but reading FLASH locations returns undefined data, and trying
to execute code from FLASH causes an illegal address reset.
After receiving the eight security bytes from the host, the MCU transmits
a break character signalling that it is ready to receive a command.
NOTE: The MCU does not transmit a break character until after the host sends
the eight security bytes.
MC68HC908KX8 • MC68HC908KX2 • MC68HC08KX8 — Rev. 1.0
MOTOROLA
Monitor ROM (MON)
Technical Data
267