MC68HC908KX8 Datasheet, PDF (295/310 Pages) Motorola, Inc – Microcontrollers

Technical Data — MC68HC908KX8 • MC68HC908KX2 • MC68HC08KX8
Appendix A. MC68HC908KX2 Overview
A.1 Contents
A.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 295
A.2 Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 295
A.2 Introduction
This appendix describes the differences between the MC68HC908KX8
and the MC68HC908KX2.
A.3 Functional Description
The MC68HC908KX2 FLASH memory is an array of 2,048 bytes with an
additional 36 bytes of user vectors and one byte used for block
protection. See Figure A-1.
NOTE: An erased bit reads as logic 1 and a programmed bit reads as logic 0.
The program and erase operations are facilitated through control bits in
the FLASH control register (FLCR). See 4.4 FLASH Control Register.
The FLASH is organized internally as an 8-word by 8-bit complementary
metal-oxide semiconductor (CMOS) page erase, byte (8-bit) program
embedded FLASH memory. Each page consists of 64 bytes. The page
erase operation erases all words within a page. A page is composed of
two adjacent rows.
A security feature prevents viewing of the FLASH contents.⁽¹⁾
See 4.4 FLASH Control Register for a complete description of FLASH
operation.
1. No security feature is absolutely secure. However, Motorola’s strategy is to make reading
or copying the FLASH difficult for unauthorized users.
MC68HC908KX8 • MC68HC908KX2 • MC68HC08KX8 — Rev. 1.0
MOTOROLA
MC68HC908KX2 Overview
Technical Data
295