MC68HC908KX8 Datasheet, PDF (57/310 Pages) Motorola, Inc – Microcontrollers

FLASH Memory
FLASH Block Protect Register
4.9 FLASH Block Protect Register
The FLASH block protect register (FLBPR) is implemented as a byte
within the FLASH memory, and therefore can be written only during a
programming sequence of the FLASH memory. The value in this register
determines the starting location of the protected range within the FLASH
memory.
Address: $FF7E
Bit 7
6
5
4
3
2
1
Read:
BPR7
Write:
BPR6
BPR5
BPR4
BPR3
BPR2
BPR1
Reset: U
U
U
U
U
U
U
U = Unaffected by reset. Initial value from factory is 1.
Write to this register is by a programming sequence to the FLASH memory.
Figure 4-3. FLASH Block Protect Register (FLBPR)
Bit 0
BPR0
U
BPR7–BPR0 — FLASH Block Protect Bits
These eight bits represent bits 13–6 of a 16-bit memory address.
Bits 15 and 14 are logic 1s and bits 5–0 are logic 0s.
The resultant 16-bit address is used for specifying the start address
of the FLASH memory for block protection. The FLASH is protected
from this start address to the end of FLASH memory, at $FFFF. With
this mechanism, the protect start address can be $XX00, $XX40, etc.,
(64 bytes page boundaries) within the FLASH memory. See
Figure 4-4 and Table 4-1.
START ADDRESS OF FLASH
BLOCK PROTECT
1
1
16-BIT MEMORY ADDRESS
FLBPR VALUE
000000
Figure 4-4. FLASH Block Protect Start Address
MC68HC908KX8 • MC68HC908KX2 • MC68HC08KX8 — Rev. 1.0
MOTOROLA
FLASH Memory
Technical Data
57