MC68HC908KX8 Datasheet, PDF (151/310 Pages) Motorola, Inc – Microcontrollers

Input/Output (I/O) Ports
Port A
10.3.1 Port A Data Register
The port A data register (PTA) contains a data latch for each of the five
port A pins.
Address: $0000
Bit 7
6
Read: 0
0
Write:
Reset:
Alternate
Function:
5
4
3
2
1
Bit 0
0
PTA4 PTA3 PTA2 PTA1 PTA0
Unaffected by reset
KBD4 KBD3 KBD2
KBD1
KBD0
Alternate
Function:
VREFH TCH1 TCH0
= Unimplemented
Figure 10-2. Port A Data Register (PTA)
PTA4–PTA0 — Port A Data Bits
These read/write bits are software programmable. Data direction of
each port A pin is under the control of the corresponding bit in data
direction register A. Reset has no effect on port A data.
KBD4–KBD0 — Keyboard Wakeup Bits
The keyboard interrupt enable bits, KBIE4–KBIE0, in the keyboard
interrupt control register, enable the port A pins as external interrupt
pins. See Section 13. Keyboard Interrupt Module (KBI).
TCH1 and TCH0 — Timer Channel I/O Bits
The PTA3/KBD3/TCH1 and PTA2/KBD2/TCH0 pins are the TIM input
capture/output compare pins. The edge/level select bits, ELSxB and
ELSxA, determine whether the pins are timer channel I/O pins or
general-purpose I/O pins. See Section 16. Timer Interface Module
(TIM).
MC68HC908KX8 • MC68HC908KX2 • MC68HC08KX8 — Rev. 1.0
MOTOROLA
Input/Output (I/O) Ports
Technical Data
151