MC68HC08AZ32A Datasheet, PDF (92/456 Pages) Motorola, Inc – HCMOS Microcontroller Unit

Freescale Semiconductor, Inc.
Central Processor Unit (CPU)
Table 6-1. Instruction Set Summary (Continued)
Source
Form
Operation
SEI
Set Interrupt Mask
STA opr
STA opr
STA opr,X
STA opr,X
STA ,X
STA opr,SP
STA opr,SP
Store A in M
STHX opr
STOP
Store H:X in M
Enable IRQ Pin; Stop Oscillator
STX opr
STX opr
STX opr,X
STX opr,X
STX ,X
STX opr,SP
STX opr,SP
Store X in M
SUB #opr
SUB opr
SUB opr
SUB opr,X
SUB opr,X
SUB ,X
SUB opr,SP
SUB opr,SP
Subtract
SWI
Software Interrupt
TAP
TAX
TPA
TST opr
TSTA
TSTX
TST opr,X
TST ,X
TST opr,SP
TSX
Transfer A to CCR
Transfer A to X
Transfer CCR to A
Test for Negative or Zero
Transfer SP to H:X
Description
I←1
M ← (A)
(M:M + 1) ← (H:X)
I ← 0; Stop Oscillator
M ← (X)
Effect on
CCR
VHI NZ C
– – 1 – – – INH
DIR
EXT
IX2
0 – – ↕ ↕ – IX1
IX
SP1
SP2
0 – – ↕ ↕ – DIR
– – 0 – – – INH
DIR
EXT
IX2
0 – – ↕ ↕ – IX1
IX
SP1
SP2
A ← (A) – (M)
IMM
DIR
EXT
↕
––
↕
↕
↕
IX2
IX1
IX
SP1
SP2
PC ← (PC) + 1; Push (PCL)
SP ← (SP) – 1; Push (PCH)
SP ← (SP) – 1; Push (X)
SP ← (SP) – 1; Push (A)
SP ← (SP) – 1; Push (CCR)
SP ← (SP) – 1; I ← 1
PCH ← Interrupt Vector High Byte
PCL ← Interrupt Vector Low Byte
CCR ← (A)
X ← (A)
A ← (CCR)
(A) – $00 or (X) – $00 or (M) – $00
H:X ← (SP) + 1
– – 1 – – – INH
↕ ↕ ↕ ↕ ↕ ↕ INH
– – – – – – INH
– – – – – – INH
DIR
INH
0
–
–
↕
↕
–
INH
IX1
IX
SP1
– – – – – – INH
9B
2
B7
C7
D7
E7
F7
9E
dd
hh
ll
ee
ff
ff
3
4
4
3
2
E7
9E
D7
ff
ee
ff
4
5
35 dd 4
8E
1
BF
CF
DF
EF
FF
9E
dd
hh
ll
ee
ff
ff
3
4
4
3
2
EF
9E
DF
ff
ee
ff
4
5
A0
B0
C0
D0
E0
F0
9E
ii
dd
hh
ll
ee
ff
ff
2
3
4
4
3
2
E0
9E
D0
ff
ee
ff
4
5
83
9
84
2
97
1
85
1
3D
4D
dd
5D
6D
7D
ff
9E
6D
ff
3
1
1
3
2
4
95
2
Technical Data
92
MC68HC08AZ32A — Rev 1.0
Central Processor Unit (CPU)
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