MC68HC08AZ32A Datasheet, PDF (304/456 Pages) Motorola, Inc – HCMOS Microcontroller Unit

I/O Ports
Freescale Semiconductor, Inc.
19.6 Port D
Port D is an 8 -bit special function port that shares seven of it’s pins with
the analog to digital converter and two with the TIMA and TIMB modules
19.6.1 Port D Data Register (PTD)
The port D data register contains a data latch for each of the eight port
D pins.
Bit 7
6
5
4
3
2
PTD
$0003
Read:
PTD7
Write:
PTD6
PTD5
PTD4
PTD3
PTD2
Reset:
Unaffected by reset
Alternate
Functions
R
ATD14/
TACLK
ATD13
ATD12/
TBCLK
ATD11
ATD10
Figure 19-10. Port D Data Register (PTD)
1
PTD1
ATD9
Bit 0
PTD0
ATD8
PTD[7:0] — Port D Data Bits
PTD[7:0] are read/write, software programmable bits. Data direction
of PTD[7:0] pins are under the control of the corresponding bit in data
direction register D.
ATD[14:8] — ADC Channel Status Bits
PTD6/ATD14/TACLK–PTD0/ATD8 are seven of the 15 analog-to-digital
converter channels. The ATD channel select bits, CH[4:0], determine
whether the PTD6/ATD14/TACLK–PTD0/ATD8 pins are ADC channels
or general purpose I/O pins. If an ADC channel is selected and a read of
this corresponding bit in the port B data register occurs, the data will be
0 if the data direction for this bit is programmed as an input. Otherwise
the data will reflect the value in the data latch.
NOTE:
Data direction register D (DDRD) does not affect the data direction of
port D pins that are being used by the TIMA or TIMB. However, the
DDRD bits always determine whether reading port D returns the states
of the latches to logic 0.
Technical Data
304
MC68HC08AZ32A — Rev 1.0
I/O Ports
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