MC68HC08AZ32A Datasheet, PDF (46/456 Pages) Motorola, Inc – HCMOS Microcontroller Unit

Memory Map
Freescale Semiconductor, Inc.
Addr.
$0014
$0015
Name
SCI Control Register 2
(SCC2)
SCI Control Register 3
(SCC3)
$0016 SCI Status Register 1 (SCS1)
$0017 SCI Status Register 2 (SCS2)
$0018 SCI Data Register (SCDR)
$0019
$001A
$001B
SCI Baud Rate Register
(SCBR)
IRQ Status and Control
Register (ISCR)
Keyboard Status/Control
(KBSCR)
$001C PLL Control Register (PCTL)
$001D
PLL Bandwidth Control
Register (PBWC)
$001E
PLL Programming Register
(PPG)
$001F
Mask Option Register A
(MORA)
$0020
Timer A Status and Control
Register (TASC)
$0021
Keyboard Interrupt Enable
Register (KBIER)
$0022
Timer A Counter Register
High (TACNTH)
$0023
Timer A Counter Register
Low (TACNTL)
$0024
Timer A Modulo Register
High (TAMODH)
$0025
Timer
A
Modulo
Register Low
(TAMODL)
$0026
Timer A Channel 0 Status and
Control Register (TASC0)
$0027
Timer A Channel 0 Register
High (TACH0H)
$0028
Timer A Channel 0 Register
Low (TACH0L)
$0029
Timer A Channel 1 Status and
Control Register (TASC1)
$002A
Timer A Channel 1 Register
High (TACH1H)
Bit 7
6
R:
W:
SCTIE
TCIE
R: R8
T8
W:
R: SCTE TC
W:
R: 0
0
W:
R: R7
R6
W: T7
T6
R: 0
0
W:
R: 0
0
W: R
R
R: 0
0
W:
R:
W:
PLLIE
PLLF
R: _AUTO LOCK
W:
R:
W: ^{MUL7 MUL6}
R: LVISTOP ROMSEC
W: R
R
R: TOF
W: 0
TOIE
R; 0
0
W:
R: Bit 15
14
W; R
R
R: Bit 7
6
W: R
R
R: _{Bit 15}
14
W:
R:
W: ^{Bit 7}
6
R: CH0F
W: 0
CH0IE
R: _{Bit 15}
14
W:
R:
W: ^{Bit 7}
6
R: CH1F
W: 0
CH1IE
R: _{Bit 15}
14
W:
5
SCRIE
R
SCRF
0
R5
T5
SCP1
0
R
0
PLLON
ACQ
MUL5
LVIRST
R
TSTOP
0
13
R
5
R
13
5
MS0B
13
5
0
R
13
4
ILIE
R
IDLE
0
R4
T4
SCP0
0
R
0
BCS
XLD
MUL4
LVIPWR
R
0
TRST
KBIE4
12
R
4
R
12
4
MS0A
12
4
MS1A
12
3
2
1
Bit 0
TE
RE
RWU SBK
ORIE
OR
NEIE
NF
FEIE
FE
PEIE
PE
0
0
BKF
RPF
R3
T3
R
IRQF
R
KEYF
1
R2
R1
R0
T2
T1
T0
SCR2 SCR1 SCR0
0
ACK
0
ACKK
1
IMASK MODE
IMASKK MODEK
1
1
0
0
0
0
VRS7 VRS6 VRS5
SSREC
R
0
R
COPRS
R
PS2
STOP
R
PS1
KBIE3 KBIE2 KBIE1
11
10
9
R
R
R
3
2
1
R
R
R
11
10
9
VRS4
COPD
R
PS0
KBIE0
Bit 8
R
Bit 0
R
Bit 8
3
2
1
Bit 0
ELS0B ELS0A TOV0 CH0MAX
11
10
9
Bit 8
3
2
1
Bit 0
ELS1B ELS1A TOV1 CH1MAX
11
10
9
Bit 8
= Unimplemented
R = Reserved
Figure 2-2. I/O Data, Status and Control Registers (Sheet 2 of 4)
Technical Data
46
MC68HC08AZ32A — Rev 1.0
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