MC68HC08AZ32A Datasheet, PDF (146/456 Pages) Motorola, Inc – HCMOS Microcontroller Unit

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Freescale Semiconductor, Inc.
9.3 Functional Description
Bit 7
6
5
4
3
2
1
MORA
$001F
Read: LVISTOP ROMSEC LVIRST LVIPWR SSREC COPRS
Write: R
R
R
R
R
R
STOP
R
Reset:
Unaffected by reset
Bit 0
COPD
R
Figure 9-1. Mask Option Register A (MORA)
LVISTOP — LVI Stop Mode Enable Bit
LVISTOP enables the LVI module in stop mode. See Low Voltage
Inhibit (LVI) on page 173.
1 = LVI enabled during stop mode
0 = LVI disabled during stop mode
ROMSEC — ROM Security Bit
ROMSEC enables the ROM security feature. Setting the ROMSEC bit
prevents access to the ROM contents.
1 = ROM security enabled
0 = ROM security disabled
LVIRST — LVI Reset Enable Bit
LVIRST enables the reset signal from the LVI module. See Low
Voltage Inhibit (LVI) on page 173.
1 = LVI module resets enabled
0 = LVI module resets disabled
LVIPWR — LVI Power Enable Bit
LVIPWR enables the LVI module. See Low Voltage Inhibit (LVI) on
page 173.
1 = LVI module power enabled
0 = LVI module power disabled
Technical Data
146
MC68HC08AZ32A — Rev 1.0
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