MC68HC08AZ32A Datasheet, PDF (232/456 Pages) Motorola, Inc – HCMOS Microcontroller Unit

Freescale Semiconductor, Inc.
Serial Peripheral Interface (SPI)
16.5.1 Master Mode
The SPI operates in master mode when the SPI master bit, SPMSTR, is
set.
NOTE:
Configure the SPI modules as master and slave before enabling them.
Enable the master SPI before enabling the slave SPI. Disable the slave
SPI before disabling the master SPI. See SPI Control Register (SPCR)
on page 252.
Only a master SPI module can initiate transmissions. Software begins
the transmission from a master SPI module by writing to the SPI data
register. If the shift register is empty, the byte immediately transfers to
the shift register, setting the SPI transmitter empty bit, SPTE. The byte
begins shifting out on the MOSI pin under the control of the serial clock.
See Figure 16-3.
The SPR1 and SPR0 bits control the baud rate generator and determine
the speed of the shift register. See SPI Status and Control Register
(SPSCR) on page 254. Through the SPSCK pin, the baud rate generator
of the master also controls the shift register of the slave peripheral.
As the byte shifts out on the MOSI pin of the master, another byte shifts
in from the slave on the master’s MISO pin. The transmission ends when
the receiver full bit, SPRF, becomes set. At the same time that SPRF
becomes set, the byte from the slave transfers to the receive data
register. In normal operation, SPRF signals the end of a transmission.
Software clears SPRF by reading the SPI status and control register with
Technical Data
232
MC68HC08AZ32A — Rev 1.0
Serial Peripheral Interface (SPI)
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