MC68HC08AZ32A Datasheet, PDF (168/456 Pages) Motorola, Inc – HCMOS Microcontroller Unit

Freescale Semiconductor, Inc.
Computer Operating Properly (COP)
12.3 Functional Description
Figure 12-1 shows the structure of the COP module.
CGMXCLK
12-BIT COP PRESCALER
STOP INSTRUCTION
INTERNAL RESET SOURCES
RESET VECTOR FETCH
COPCTL WRITE
COPD FROM MORA
RESET
COPCTL WRITE
COPRS FROM MORA
6-BIT COP COUNTER
CLEAR COP
COUNTER
RESET
RESET STATUS
REGISTER
Figure 12-1. COP Block Diagram
Table 12-1. COP I/O Register Summary
Register Name
Bit 7 6
5
4
3
2
COP Control Register (COPCTL)
1 Bit 0 Addr.
$FFFF
Technical Data
168
The COP counter is a free-running 6-bit counter preceded by a12-bit
prescaler. If not cleared by software, the COP counter overflows and
generates an asynchronous reset after 2¹³ – 2⁴, or 2¹⁸ – 2⁴ CGMXCLK
cycles, depending on the state of the COP rate select bit, COPRS in
MC68HC08AZ32A — Rev 1.0
Computer Operating Properly (COP)
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