MC68HC08AZ32A Datasheet, PDF (295/456 Pages) Motorola, Inc – HCMOS Microcontroller Unit

Freescale Semiconductor, Inc.
I/O Ports
Port A
Table 19-1. I/O Port Register Summary (Continued)
Register Name
Bit 7
6
5
4
3
2
1 Bit 0 Addr.
Data Direction Register G (DDRG) ^{R: 0}
W: R
Data Direction Register H (DDRH) ^{R: 0}
W: R
0
0
0
R
R
R
0
0
0
R
R
R
0 _{DDRG2 DDRG1 DDRG0 $000E}
R
0
0 _{DDRH1 DDRH0 $000F}
R
R
R = Reserved
19.3 Port A
Port A is an 8-bit general-purpose bidirectional I/O port.
19.3.1 Port A Data Register (PTA)
The port A data register contains a data latch for each of the eight port
A pins.
PTA
$0000
Read:
Write:
Reset:
Bit 7
6
5
4
3
2
PTA7 PTA6 PTA5 PTA4 PTA3 PTA2
Unaffected by reset
Figure 19-1. Port A data register (PTA)
1
PTA1
Bit 0
PTA0
PTA[7:0] — Port A Data Bits
These read/write bits are software programmable. Data direction of
each port A pin is under the control of the corresponding bit in data
direction register A. Reset has no effect on port A data.
MC68HC08AZ32A — Rev 1.0
MOTOROLA
I/O Ports
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Technical Data
295