MC68HC08AZ32A Datasheet, PDF (253/456 Pages) Motorola, Inc – HCMOS Microcontroller Unit

Freescale Semiconductor, Inc.
Serial Peripheral Interface (SPI)
I/O Registers
CPOL — Clock Polarity
This read/write bit determines the logic state of the SPSCK pin
between transmissions. See Figure 16-4 and Figure 16-5. To
transmit data between SPI modules, the SPI modules must have
identical CPOL bits. Reset clears the CPOL bit.
CPHA — Clock Phase
This read/write bit controls the timing relationship between the serial
clock and SPI data. See Figure 16-4 and Figure 16-5. To transmit
data between SPI modules, the SPI modules must have identical
CPHA bits. When CPHA = ‘0’, the SS pin of the slave SPI module
must be set to logic one between bytes. See Figure 16-11. Reset sets
the CPHA bit.
When CPHA =’0’ for a slave, the falling edge of SS indicates the
beginning of the transmission. This causes the SPI to leave its idle
state and begin driving the MISO pin with the MSB of its data. Once
the transmission begins, no new data is allowed into the shift register
from the data register. Therefore, the slave data register must be
loaded with the desired transmit data before the falling edge of SS.
Any data written after the falling edge is stored in the data register and
transferred to the shift register at the current transmission.
When CPHA = ‘1’ for a slave, the first edge of the SPSCK indicates
the beginning of the transmission. The same applies when SS is high
for a slave. The MISO pin is held in a high-impedance state, and the
incoming SPSCK is ignored. In certain cases, it may also cause the
MODF flag to be set. See Mode Fault Error on page 241. A logic ‘1’
on the SS pin does not affect the state of the SPI state machine in any
way.
SPWOM — SPI Wired-OR Mode
This read/write bit disables the pull-up devices on pins SPSCK,
MOSI, and MISO so that those pins become open-drain outputs.
1 = Wired-OR SPSCK, MOSI, and MISO pins
0 = Normal push-pull SPSCK, MOSI, and MISO pins
MC68HC08AZ32A — Rev 1.0
MOTOROLA
Serial Peripheral Interface (SPI)
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Technical Data
253