MC68HC08AZ32A Datasheet, PDF (291/456 Pages) Motorola, Inc – HCMOS Microcontroller Unit

Freescale Semiconductor, Inc.
Programmable Interrupt Timer (PIT)
I/O Registers
18.8.3 PIT Counter Modulo Registers
The read/write PIT modulo registers contain the modulo value for the PIT
counter. When the PIT counter reaches the modulo value the overflow
flag (POF) becomes set and the PIT counter resumes counting from
$0000 at the next timer clock. Writing to the high byte (PMODH) inhibits
the POF bit and overflow interrupts until the low byte (PMODL) is written.
Reset sets the PIT counter modulo registers.
Address: $004E:$004F
Bit 7
6
5
4
3
2
1
Bit 0
Read:
Bit 15
14
13
12
11
10
Write:
9
Bit 8
Reset: 1
1
1
1
1
1
1
1
Address: $004E:$004F
Bit 7
6
5
4
3
2
1
Bit 0
Read:
Bit 7
6
5
4
3
2
1
Bit 0
Write:
Reset: 1
1
1
1
1
1
1
1
Figure 18-5. PIT Counter Modulo Registers (PMODH–PMODL)
NOTE: Reset the PIT counter before writing to the PIT counter modulo registers.
MC68HC08AZ32A — Rev 1.0
MOTOROLA
Programmable Interrupt Timer (PIT)
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Technical Data
291