MC68HC08AZ32A Datasheet, PDF (438/456 Pages) Motorola, Inc – HCMOS Microcontroller Unit

Freescale Semiconductor, Inc.
MC68HC08AZ32A Changes
25.2.2 Monitor ROM
The monitor ROM is now allocated 320 bytes within the memory map
though not all that space is necessarily used. Functionality of the monitor
ROM is unchanged.
25.2.3 EEPROM
25.2.3.1 EEPROM Architecture
The EEPROM is made from a new NVM technology. However, the bit
polarity remains the same i.e. programmed=0, erased=1. The
architecture and basic programming and erase operations are
unchanged.
25.2.3.2 EEPROM Clock Source and Pre-scaler
The first major difference on the new EEPROM is that it requires a
constant time base source to ensure secure programming and erase
operations. This is done by firstly selecting which clock source is going
to drive the EEDIV clock divider input using a new bit 7 introduced onto
the MORB mask option register $FE09. Next the divide ratio from this
source has to be set by programming an 11-bit time base pre-scalar into
bits spread over two new registers, EEDIVH and EEDIVL.
The EEDIVH and EEDIVL registers are volatile. However, they are
loaded upon reset by the contents of duplicate non-volatile EEDIVHNVR
and EEDIVLNVR registers much in the same way as the array control
register (EEACR) interacts with the non-volatile register (EENVR) for
configuration control on the existing revision. As a result of the new
EEDIV clock described above, bit 7 (EEBCLK) of the EEPROM control
register (EECR) is no longer used.
Technical Data
438
MC68HC08AZ32A — Rev 1.0
MC68HC08AZ32A Changes
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