MC68HC08AZ32A Datasheet, PDF (317/456 Pages) Motorola, Inc – HCMOS Microcontroller Unit

Freescale Semiconductor, Inc.
I/O Ports
Port G
When bit DDRGx is a logic one, reading address $000A reads the PTGx
data latch. When bit DDRGx is a logic zero, reading address $000A
reads the voltage level on the pin. The data latch can always be written,
regardless of the state of its data. Table 19-8 summarises the operation
of the port G pins.
Table 19-8. Port G Pin Functions
DDRG Bit
PTG Bit
I/O Pin Mode
Accesses to
DDRG
Read/Write
0
X⁽¹⁾
Input, Hi-Z^{(2) DDRG[2:0]}
1
X
Output
DDRG[2:0]
1. X = don’t care
2. Hi-Z = high impedance
3. Writing affects data register, but does not affect input.
Accesses to PTG
Read
Pin
PTG[2:0]
Write
PTG[2:0]⁽³⁾
PTG[2:0]
MC68HC08AZ32A — Rev 1.0
MOTOROLA
I/O Ports
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Technical Data
317