MC68HC08AZ32A Datasheet, PDF (414/456 Pages) Motorola, Inc – HCMOS Microcontroller Unit

Freescale Semiconductor, Inc.
Analog-to-Digital Converter (ADC-15)
ADC will return a logic 0 if the corresponding DDR bit is at logic 0. If the
DDR bit is at logic 1, the value in the port data latch is read.
NOTE:
Do not use ADC channels ATD14 or ATD12 when using the
PTD6/ATD14/TACLK or PTD4/ATD12/TBCLK pins as the clock inputs
for the 16-bit Timers.
23.4.2 Voltage Conversion
When the input voltage to the ADC equals V_REFH (see Electrical
Specifications on page 423), the ADC converts the signal to $FF (full
scale). If the input voltage equals AV_SS/V_REFL, the ADC converts it to
$00. Input voltages between V_REFH and AV_SS/V_REFL are a straight-line
linear conversion. Conversion accuracy of all other input voltages is not
guaranteed. Avoid current injection on unused ADC inputs to prevent
potential conversion error.
NOTE: Input voltage should not exceed the analog supply voltages.
23.4.3 Conversion Time
Conversion starts after a write to the ADSCR (ADC status control
register, $0038), and requires between 16 and 17 ADC clock cycles to
complete. Conversion time in terms of the number of bus cycles is a
function of ADICLK select, CGMXCLK frequency, bus frequency, and
ADIV prescaler bits. For example, with a CGMXCLK frequency of 4
MHz, bus frequency of 8 MHz, and fixed ADC clock frequency of 1 MHz,
one conversion will take between 16 and 17 µs and there will be between
128 bus cycles between each conversion. Sample rate is approximately
60 kHz.
Refer to Electrical Specifications on page 423.
Conversion Time = ¹ï£§⁶^to¹⁷^A^D^C ^Cl^oc^{k C}^y^cle^s
ADC Clock Frequency
Number of Bus Cycles = Conversion Time x Bus Frequency
Technical Data
414
MC68HC08AZ32A — Rev 1.0
Analog-to-Digital Converter (ADC-15)
For More Information On This Product,
Go to: www.freescale.com
MOTOROLA