MC68HC08AZ32A Datasheet, PDF (178/456 Pages) Motorola, Inc – HCMOS Microcontroller Unit

Freescale Semiconductor, Inc.
Low Voltage Inhibit (LVI)
13.7.2 Stop Mode
With LVISTOP=1 and LVIPWR=1 in the MORA register, the LVI module
will be active after a STOP instruction. Because CPU clocks are disabled
during stop mode, the LVI trip must bypass the digital filter to generate a
reset and bring the MCU out of stop.
With the LVIPWR bit in the MORA register at a logic 1 and the LVISTOP
bit at a logic 0, the LVI module will be inactive after a STOP instruction.
Note that the LVI feature is intended to provide the safe shutdown
of the microcontroller and thus protection of related circuitry prior
to any application V_DD voltage collapsing completely to an unsafe
level. Is is not intended that users operate the microcontroller at
lower than the specified operating voltage, V_DD.
Technical Data
178
MC68HC08AZ32A — Rev 1.0
Low Voltage Inhibit (LVI)
For More Information On This Product,
Go to: www.freescale.com
MOTOROLA