MC68HC08AZ32A Datasheet, PDF (300/456 Pages) Motorola, Inc – HCMOS Microcontroller Unit

I/O Ports
Freescale Semiconductor, Inc.
When bit DDRBx is a logic one, reading address $0001 reads the PTBx
data latch. When bit DDRBx is a logic zero, reading address $0001
reads the voltage level on the pin. The data latch can always be written,
regardless of the state of its data direction bit. Table 19-3 summarizes
the operation of the port B pins.
Table 19-3. Port B Pin Functions
DDRB Bit
PTB Bit
I/O Pin Mode
Accesses to
DDRB
Read/Write
0
X⁽¹⁾
Input, Hi-Z^{(2) DDRB[7:0]}
1
X
Output
DDRB[7:0]
1. X = don’t care
2. Hi-Z = high impedance
3. Writing affects data register, but does not affect input.
Accesses to PTB
Read
Pin
PTB[7:0]
Write
PTB[7:0]⁽³⁾
PTB[7:0]
Technical Data
300
MC68HC08AZ32A — Rev 1.0
I/O Ports
For More Information On This Product,
Go to: www.freescale.com
MOTOROLA