PIC18F67J11-IPT Datasheet, PDF (64/448 Pages) Microchip Technology – 64/80-Pin High-Performance, 1-Mbit Flash Microcontrollers with nanoWatt Technology

PIC18F87J11 FAMILY
5.1.1 HARD MEMORY VECTORS
All PIC18 devices have a total of three hard-coded
return vectors in their program memory space. The
Reset vector address is the default value to which the
program counter returns on all device Resets; it is
located at 0000h.
PIC18 devices also have two interrupt vector
addresses for the handling of high-priority and
low-priority interrupts. The high-priority interrupt vector
is located at 0008h and the low-priority interrupt vector
is at 0018h. Their locations in relation to the program
memory map are shown in Figure 5-2.
FIGURE 5-2:
HARD VECTOR AND
CONFIGURATION WORD
LOCATIONS FOR
PIC18F87J11 FAMILY
DEVICES
Reset Vector
0000h
High-Priority Interrupt Vector 0008h
Low-Priority Interrupt Vector 0018h
On-Chip
Program Memory
Flash Configuration Words ^{(Top of Memory-7)}
(Top of Memory)
5.1.2 FLASH CONFIGURATION WORDS
Because PIC18F87J11 Family devices do not have
persistent configuration memory, the top four words of
on-chip program memory are reserved for configuration
information. On Reset, the configuration information is
copied into the Configuration registers.
The Configuration Words are stored in their program
memory location in numerical order, starting with the
lower byte of CONFIG1 at the lowest address and
ending with the upper byte of CONFIG4. For these
devices, only Configuration Words, CONFIG1 through
CONFIG3, are used; CONFIG4 is reserved. The actual
addresses of the Flash Configuration Word for devices
in the PIC18F87J11 Family are shown in Table 5-1.
Their location in the memory map is shown with the
other memory vectors in Figure 5-2.
Additional details on the device Configuration Words
are provided in Section 24.1 “Configuration Bits”.
TABLE 5-1:
FLASH CONFIGURATION
WORD FOR PIC18F87J11
FAMILY DEVICES
Device
Program
Memory
(Kbytes)
Configuration
Word
Addresses
PIC18F66J11
64
PIC18F86J11
PIC18F66J16
96
PIC18F86J16
PIC18F67J11
128
PIC18F87J11
FFF8h to
FFFFh
17FF8h to
17FFFh
1FFF8h to
1FFFFh
Read as ‘0’
1FFFFFh
Legend:
(Top of Memory) represents upper boundary
of on-chip program memory space (see
Figure 5-1 for device-specific values).
Shaded area represents unimplemented
memory. Areas are not shown to scale.
DS39778D-page 64
© 2009 Microchip Technology Inc.